ChibiOS/RT
2.5.1
ARMv6-M Specific Implementation
Collaboration diagram for ARMv6-M Specific Implementation:

Detailed Description

ARMv6-M specific port code, structures and macros.

Data Structures

struct  context
 Platform dependent part of the Thread structure. More...

Functions

 CH_IRQ_HANDLER (SysTickVector)
 System Timer vector.
void NMIVector (void)
 NMI vector.
void PendSVVector (void)
 PendSV vector.
void _port_irq_epilogue (regarm_t lr)
 IRQ epilogue code.
void _port_switch_from_isr (void)
 Post-IRQ switch code.
void _port_switch (Thread *ntp, Thread *otp)
 Performs a context switch between two threads.
void _port_thread_start (void)
 Start a thread by invoking its work function.
void port_halt (void)
 Halts the system.

Defines

#define CORTEX_PRIORITY_PENDSV   0
 PendSV priority level.
#define PORT_IDLE_THREAD_STACK_SIZE   16
 Stack size for the system idle thread.
#define PORT_INT_REQUIRED_STACK   32
 Per-thread stack overhead for interrupts servicing.
#define CORTEX_ENABLE_WFI_IDLE   FALSE
 Enables the use of the WFI instruction in the idle thread loop.
#define CORTEX_PRIORITY_SYSTICK   (CORTEX_PRIORITY_LEVELS >> 1)
 SYSTICK handler priority.
#define CORTEX_ALTERNATE_SWITCH   FALSE
 Alternate preemption method.
#define CORTEX_MAX_KERNEL_PRIORITY   1
 Maximum usable priority for normal ISRs.
#define CH_ARCHITECTURE_ARM_v6M
 Macro defining the specific ARM architecture.
#define CH_ARCHITECTURE_NAME   "ARMv6-M"
 Name of the implemented architecture.
#define CH_CORE_VARIANT_NAME   "Cortex-M0"
 Name of the architecture variant.
#define CH_PORT_INFO   "Preemption through NMI"
 Port-specific information string.
#define SETUP_CONTEXT(workspace, wsize, pf, arg)
 Platform dependent part of the chThdCreateI() API.
#define STACK_ALIGN(n)   ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
 Enforces a correct alignment for a stack area size value.
#define THD_WA_SIZE(n)
 Computes the thread working area global size.
#define WORKING_AREA(s, n)   stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
 Static working area allocation.
#define PORT_IRQ_PROLOGUE()
 IRQ prologue code.
#define PORT_IRQ_EPILOGUE()   _port_irq_epilogue(_saved_lr)
 IRQ epilogue code.
#define PORT_IRQ_HANDLER(id)   void id(void)
 IRQ handler function declaration.
#define PORT_FAST_IRQ_HANDLER(id)   void id(void)
 Fast IRQ handler function declaration.
#define port_init()
 Port-related initialization code.
#define port_lock()   asm volatile ("cpsid i" : : : "memory")
 Kernel-lock action.
#define port_unlock()   asm volatile ("cpsie i" : : : "memory")
 Kernel-unlock action.
#define port_lock_from_isr()   port_lock()
 Kernel-lock action from an interrupt handler.
#define port_unlock_from_isr()   port_unlock()
 Kernel-unlock action from an interrupt handler.
#define port_disable()   asm volatile ("cpsid i" : : : "memory")
 Disables all the interrupt sources.
#define port_suspend()   asm volatile ("cpsid i" : : : "memory")
 Disables the interrupt sources below kernel-level priority.
#define port_enable()   asm volatile ("cpsie i" : : : "memory")
 Enables all the interrupt sources.
#define port_wait_for_interrupt()   asm volatile ("wfi" : : : "memory")
 Enters an architecture-dependent IRQ-waiting mode.
#define port_switch(ntp, otp)   _port_switch(ntp, otp)
 Performs a context switch between two threads.

Typedefs

typedef void * regarm_t
 Generic ARM register.

Function Documentation

CH_IRQ_HANDLER ( SysTickVector  )

System Timer vector.

This interrupt is used as system tick.

Note:
The timer must be initialized in the startup code.

Definition at line 40 of file chcore_v6m.c.

References CH_IRQ_EPILOGUE, CH_IRQ_PROLOGUE, chSysLockFromIsr, chSysTimerHandlerI(), and chSysUnlockFromIsr.

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void NMIVector ( void  )

NMI vector.

The NMI vector is used for exception mode re-entering after a context switch.

Definition at line 57 of file chcore_v6m.c.

References port_unlock_from_isr.

void PendSVVector ( void  )

PendSV vector.

The PendSV vector is used for exception mode re-entering after a context switch.

Definition at line 75 of file chcore_v6m.c.

void _port_irq_epilogue ( regarm_t  lr)

IRQ epilogue code.

Parameters:
[in]lrvalue of the LR register on ISR entry

Definition at line 95 of file chcore_v6m.c.

References _port_switch_from_isr(), chSchIsPreemptionRequired(), and port_lock_from_isr.

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void _port_switch_from_isr ( void  )

Post-IRQ switch code.

The switch is performed in thread context then an NMI exception is enforced in order to return to the exact point before the preemption.

Definition at line 134 of file chcore_v6m.c.

References chSchDoReschedule(), dbg_check_lock(), dbg_check_unlock(), port_unlock, and TRUE.

Referenced by _port_irq_epilogue().

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void _port_switch ( Thread ntp,
Thread otp 
)

Performs a context switch between two threads.

This is the most critical code in any port, this function is responsible for the context switch between 2 threads.

Note:
The implementation of this code affects directly the context switch performance so optimize here as much as you can.
Parameters:
[in]ntpthe thread to be switched in
[in]otpthe thread to be switched out

Definition at line 165 of file chcore_v6m.c.

References Thread::p_ctx.

void _port_thread_start ( void  )

Start a thread by invoking its work function.

If the work function returns chThdExit() is automatically invoked.

Definition at line 191 of file chcore_v6m.c.

References chSysUnlock.

void port_halt ( void  )

Halts the system.

Note:
The function is declared as a weak symbol, it is possible to redefine it in your application code.

Definition at line 39 of file chcore.c.


Define Documentation

#define CORTEX_PRIORITY_PENDSV   0

PendSV priority level.

Note:
This priority is enforced to be equal to 0, this handler always has the highest priority that cannot preempt the kernel.

Definition at line 42 of file chcore_v6m.h.

Referenced by _port_init().

#define PORT_IDLE_THREAD_STACK_SIZE   16

Stack size for the system idle thread.

This size depends on the idle thread implementation, usually the idle thread should take no more space than those reserved by PORT_INT_REQUIRED_STACK.

Note:
In this port it is set to 16 because the idle thread does have a stack frame when compiling without optimizations. You may reduce this value to zero when compiling with optimizations.

Definition at line 62 of file chcore_v6m.h.

#define PORT_INT_REQUIRED_STACK   32

Per-thread stack overhead for interrupts servicing.

This constant is used in the calculation of the correct working area size.

Note:
In this port this value is conservatively set to 32 because the function chSchDoReschedule() can have a stack frame, especially with compiler optimizations disabled. The value can be reduced when compiler optimizations are enabled.

Definition at line 75 of file chcore_v6m.h.

#define CORTEX_ENABLE_WFI_IDLE   FALSE

Enables the use of the WFI instruction in the idle thread loop.

Definition at line 82 of file chcore_v6m.h.

#define CORTEX_PRIORITY_SYSTICK   (CORTEX_PRIORITY_LEVELS >> 1)

SYSTICK handler priority.

Note:
The default SYSTICK handler priority is calculated as the priority level in the middle of the numeric priorities range.

Definition at line 91 of file chcore_v6m.h.

Referenced by _port_init().

#define CORTEX_ALTERNATE_SWITCH   FALSE

Alternate preemption method.

Activating this option will make the Kernel use the PendSV handler for preemption instead of the NMI handler.

Definition at line 103 of file chcore_v6m.h.

#define CORTEX_MAX_KERNEL_PRIORITY   1

Maximum usable priority for normal ISRs.

Definition at line 114 of file chcore_v6m.h.

#define CH_ARCHITECTURE_ARM_v6M

Macro defining the specific ARM architecture.

Definition at line 126 of file chcore_v6m.h.

#define CH_ARCHITECTURE_NAME   "ARMv6-M"

Name of the implemented architecture.

Definition at line 131 of file chcore_v6m.h.

#define CH_CORE_VARIANT_NAME   "Cortex-M0"

Name of the architecture variant.

Definition at line 137 of file chcore_v6m.h.

#define CH_PORT_INFO   "Preemption through NMI"

Port-specific information string.

Definition at line 146 of file chcore_v6m.h.

#define SETUP_CONTEXT (   workspace,
  wsize,
  pf,
  arg 
)
Value:
{                          \
  tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace +                  \
                                     wsize -                                \
                                     sizeof(struct intctx));                \
  tp->p_ctx.r13->r4 = (void *)(pf);                                         \
  tp->p_ctx.r13->r5 = (void *)(arg);                                        \
  tp->p_ctx.r13->lr = (void *)(_port_thread_start);                         \
}

Platform dependent part of the chThdCreateI() API.

This code usually setup the context switching frame represented by an intctx structure.

Definition at line 207 of file chcore_v6m.h.

Referenced by chThdCreateI().

#define STACK_ALIGN (   n)    ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)

Enforces a correct alignment for a stack area size value.

Definition at line 219 of file chcore_v6m.h.

#define THD_WA_SIZE (   n)
Value:
STACK_ALIGN(sizeof(Thread) +                         \
                                   sizeof(struct intctx) +                  \
                                   sizeof(struct extctx) +                  \
                                   (n) + (PORT_INT_REQUIRED_STACK))

Computes the thread working area global size.

Definition at line 224 of file chcore_v6m.h.

Referenced by chThdCreateI().

#define WORKING_AREA (   s,
 
)    stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]

Static working area allocation.

This macro is used to allocate a static thread working area aligned as both position and size.

Definition at line 234 of file chcore_v6m.h.

#define PORT_IRQ_PROLOGUE ( )
Value:
regarm_t _saved_lr;                                                       \
  asm volatile ("mov     %0, lr" : "=r" (_saved_lr) : : "memory")

IRQ prologue code.

This macro must be inserted at the start of all IRQ handlers enabled to invoke system APIs.

Definition at line 241 of file chcore_v6m.h.

#define PORT_IRQ_EPILOGUE ( )    _port_irq_epilogue(_saved_lr)

IRQ epilogue code.

This macro must be inserted at the end of all IRQ handlers enabled to invoke system APIs.

Definition at line 250 of file chcore_v6m.h.

#define PORT_IRQ_HANDLER (   id)    void id(void)

IRQ handler function declaration.

Note:
id can be a function name or a vector number depending on the port implementation.

Definition at line 257 of file chcore_v6m.h.

#define PORT_FAST_IRQ_HANDLER (   id)    void id(void)

Fast IRQ handler function declaration.

Note:
id can be a function name or a vector number depending on the port implementation.

Definition at line 264 of file chcore_v6m.h.

#define port_init ( )
Value:

Port-related initialization code.

Definition at line 269 of file chcore_v6m.h.

Referenced by chSysInit().

#define port_lock ( )    asm volatile ("cpsid i" : : : "memory")

Kernel-lock action.

Usually this function just disables interrupts but may perform more actions.

Definition at line 282 of file chcore_v6m.h.

#define port_unlock ( )    asm volatile ("cpsie i" : : : "memory")

Kernel-unlock action.

Usually this function just enables interrupts but may perform more actions.

Definition at line 289 of file chcore_v6m.h.

Referenced by _port_switch_from_isr().

#define port_lock_from_isr ( )    port_lock()

Kernel-lock action from an interrupt handler.

This function is invoked before invoking I-class APIs from interrupt handlers. The implementation is architecture dependent, in its simplest form it is void.

Note:
Same as port_lock() in this port.

Definition at line 298 of file chcore_v6m.h.

Referenced by _port_irq_epilogue(), dbg_check_enter_isr(), and dbg_check_leave_isr().

#define port_unlock_from_isr ( )    port_unlock()

Kernel-unlock action from an interrupt handler.

This function is invoked after invoking I-class APIs from interrupt handlers. The implementation is architecture dependent, in its simplest form it is void.

Note:
Same as port_lock() in this port.

Definition at line 307 of file chcore_v6m.h.

Referenced by _port_irq_epilogue(), dbg_check_enter_isr(), dbg_check_leave_isr(), NMIVector(), and SVCallVector().

#define port_disable ( )    asm volatile ("cpsid i" : : : "memory")

Disables all the interrupt sources.

Definition at line 312 of file chcore_v6m.h.

Referenced by port_halt().

#define port_suspend ( )    asm volatile ("cpsid i" : : : "memory")

Disables the interrupt sources below kernel-level priority.

Definition at line 317 of file chcore_v6m.h.

#define port_enable ( )    asm volatile ("cpsie i" : : : "memory")

Enables all the interrupt sources.

Definition at line 322 of file chcore_v6m.h.

#define port_wait_for_interrupt ( )    asm volatile ("wfi" : : : "memory")

Enters an architecture-dependent IRQ-waiting mode.

The function is meant to return when an interrupt becomes pending. The simplest implementation is an empty function or macro but this would not take advantage of architecture-specific power saving modes.

Note:
Implemented as an inlined WFI instruction.

Definition at line 333 of file chcore_v6m.h.

Referenced by _idle_thread().

#define port_switch (   ntp,
  otp 
)    _port_switch(ntp, otp)

Performs a context switch between two threads.

This is the most critical code in any port, this function is responsible for the context switch between 2 threads.

Note:
The implementation of this code affects directly the context switch performance so optimize here as much as you can.
Parameters:
[in]ntpthe thread to be switched in
[in]otpthe thread to be switched out

Definition at line 349 of file chcore_v6m.h.


Typedef Documentation

typedef void* regarm_t

Generic ARM register.

Definition at line 160 of file chcore_v6m.h.