Collaboration diagram for Core Port Implementation:

Detailed Description

ARM7/9 specific port code, structures and macros.

Data Structures
struct	extctx
	Interrupt saved context. More...
struct	intctx
	System saved context. More...
struct	context
	Platform dependent part of the `Thread` structure. More...
Functions
void	port_halt (void)
void	_port_thread_start (void)
	Thread start code.
Defines
#define	ARM_CORE_ARM7TDMI 7
#define	ARM_CORE_ARM9 9
#define	ARM_ENABLE_WFI_IDLE FALSE
	If enabled allows the idle thread to enter a low power mode.
#define	CH_ARCHITECTURE_ARM
	Macro defining a generic ARM architecture.
#define	CH_ARCHITECTURE_ARMx
	Macro defining the specific ARM architecture.
#define	CH_ARCHITECTURE_NAME "ARMx"
	Name of the implemented architecture.
#define	CH_CORE_VARIANT_NAME "ARMxy"
	Name of the architecture variant (optional).
#define	CH_PORT_INFO "ARM\|THUMB\|Interworking"
	Port-specific information string.
#define	CH_PORT_INFO "Pure ARM mode"
	Port-specific information string.
#define	CH_COMPILER_NAME "GCC " __VERSION__
	Name of the compiler supported by this port.
#define	SETUP_CONTEXT(workspace, wsize, pf, arg)
	Platform dependent part of the `chThdCreateI()` API.
#define	PORT_IDLE_THREAD_STACK_SIZE 4
	Stack size for the system idle thread.
#define	PORT_INT_REQUIRED_STACK 0x10
	Per-thread stack overhead for interrupts servicing.
#define	STACK_ALIGN(n) ((((n) - 1) \| (sizeof(stkalign_t) - 1)) + 1)
	Enforces a correct alignment for a stack area size value.
#define	THD_WA_SIZE(n)
	Computes the thread working area global size.
#define	WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
	Static working area allocation.
#define	PORT_IRQ_PROLOGUE()
	IRQ prologue code.
#define	PORT_IRQ_EPILOGUE()
	IRQ epilogue code.
#define	PORT_IRQ_HANDLER(id) __attribute__((naked)) void id(void)
	IRQ handler function declaration.
#define	PORT_FAST_IRQ_HANDLER(id) __attribute__((interrupt("FIQ"))) void id(void)
	Fast IRQ handler function declaration.
#define	port_init()
	Port-related initialization code.
#define	port_lock() asm volatile ("msr CPSR_c, #0x9F" : : : "memory")
	Kernel-lock action.
#define	port_unlock() asm volatile ("msr CPSR_c, #0x1F" : : : "memory")
	Kernel-unlock action.
#define	port_lock_from_isr()
	Kernel-lock action from an interrupt handler.
#define	port_unlock_from_isr()
	Kernel-unlock action from an interrupt handler.
#define	port_disable()
	Disables all the interrupt sources.
#define	port_suspend() asm volatile ("msr CPSR_c, #0x9F" : : : "memory")
	Disables the interrupt sources below kernel-level priority.
#define	port_enable() asm volatile ("msr CPSR_c, #0x1F" : : : "memory")
	Enables all the interrupt sources.
#define	port_switch(ntp, otp) _port_switch_arm(ntp, otp)
	Performs a context switch between two threads.
#define	INLINE inline
	Inline function modifier.
#define	ROMCONST const
	ROM constant modifier.
#define	PACK_STRUCT_STRUCT __attribute__((packed))
	Packed structure modifier (within).
#define	PACK_STRUCT_BEGIN
	Packed structure modifier (before).
#define	PACK_STRUCT_END
	Packed structure modifier (after).
Typedefs
typedef uint32_t	stkalign_t
	32 bits stack and memory alignment enforcement.
typedef void *	regarm_t
	Generic ARM register.
typedef int32_t	bool_t
typedef uint8_t	tmode_t
typedef uint8_t	tstate_t
typedef uint8_t	trefs_t
typedef uint8_t	tslices_t
typedef uint32_t	tprio_t
typedef int32_t	msg_t
typedef int32_t	eventid_t
typedef uint32_t	eventmask_t
typedef uint32_t	flagsmask_t
typedef uint32_t	systime_t
typedef int32_t	cnt_t

Function Documentation

void port_halt ( void )

Halts the system.

Definition at line 37 of file ports/GCC/ARM/chcore.c.

References port_disable, and TRUE.

void _port_thread_start ( void )

Thread start code.

If the work function returns chThdExit() is automatically invoked.

Definition at line 51 of file ports/cosmic/STM8/chcore.c.

Define Documentation

#define ARM_CORE_ARM7TDMI 7

ARM77TDMI core identifier.

Definition at line 37 of file ports/GCC/ARM/chcore.h.

#define ARM_CORE_ARM9 9

ARM9 core identifier.

Definition at line 38 of file ports/GCC/ARM/chcore.h.

#define ARM_ENABLE_WFI_IDLE FALSE

If enabled allows the idle thread to enter a low power mode.

Definition at line 65 of file ports/GCC/ARM/chcore.h.

#define CH_ARCHITECTURE_ARM

Macro defining a generic ARM architecture.

Definition at line 75 of file ports/GCC/ARM/chcore.h.

#define CH_ARCHITECTURE_ARMx

Macro defining the specific ARM architecture.

Note:

This macro is for documentation only, the real name changes depending on the selected architecture, the possible names are:

CH_ARCHITECTURE_ARM7TDMI.
CH_ARCHITECTURE_ARM9.

Definition at line 86 of file ports/GCC/ARM/chcore.h.

#define CH_ARCHITECTURE_NAME "ARMx"

Name of the implemented architecture.

Note:

The value is for documentation only, the real value changes depending on the selected architecture, the possible values are:

"ARM7".
"ARM9".

Definition at line 96 of file ports/GCC/ARM/chcore.h.

#define CH_CORE_VARIANT_NAME "ARMxy"

Name of the architecture variant (optional).

Note:

The value is for documentation only, the real value changes depending on the selected architecture, the possible values are:

"ARM7TDMI"
"ARM9"

Definition at line 106 of file ports/GCC/ARM/chcore.h.

Referenced by TestThread().

#define CH_PORT_INFO "ARM|THUMB|Interworking"

Port-specific information string.

Note:

The value is for documentation only, the real value changes depending on the selected options, the possible values are:

"Pure ARM"
"Pure THUMB"
"Interworking"

Definition at line 137 of file ports/GCC/ARM/chcore.h.

#define CH_PORT_INFO "Pure ARM mode"

Port-specific information string.

Note:

The value is for documentation only, the real value changes depending on the selected options, the possible values are:

"Pure ARM"
"Pure THUMB"
"Interworking"

Definition at line 137 of file ports/GCC/ARM/chcore.h.

#define CH_COMPILER_NAME "GCC " __VERSION__

Name of the compiler supported by this port.

Definition at line 143 of file ports/GCC/ARM/chcore.h.

#define SETUP_CONTEXT	(	workspace,
		wsize,
		pf,
		arg
	)

Value:

{                          \
  tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace +                  \
                                     wsize -                                \
                                     sizeof(struct intctx));                \
  tp->p_ctx.r13->r4 = pf;                                                   \
  tp->p_ctx.r13->r5 = arg;                                                  \
  tp->p_ctx.r13->lr = _port_thread_start;                                   \
}

Platform dependent part of the chThdCreateI() API.

This code usually setup the context switching frame represented by an intctx structure.

Definition at line 206 of file ports/GCC/ARM/chcore.h.

#define PORT_IDLE_THREAD_STACK_SIZE 4

Stack size for the system idle thread.

This size depends on the idle thread implementation, usually the idle thread should take no more space than those reserved by PORT_INT_REQUIRED_STACK.

Note:: In this port it is set to 4 because the idle thread does have a stack frame when compiling without optimizations.

Definition at line 224 of file ports/GCC/ARM/chcore.h.

#define PORT_INT_REQUIRED_STACK 0x10

Per-thread stack overhead for interrupts servicing.

This constant is used in the calculation of the correct working area size. This value can be zero on those architecture where there is a separate interrupt stack and the stack space between intctx and extctx is known to be zero.

Note:: In this port 0x10 is a safe value, it can be reduced after careful analysis of the generated code.

Definition at line 238 of file ports/GCC/ARM/chcore.h.

#define STACK_ALIGN ( n ) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)

Enforces a correct alignment for a stack area size value.

Definition at line 244 of file ports/GCC/ARM/chcore.h.

#define THD_WA_SIZE ( n )

Value:

STACK_ALIGN(sizeof(Thread) +                         \
                                   sizeof(struct intctx) +                  \
                                   sizeof(struct extctx) +                  \
                                   (n) + (PORT_INT_REQUIRED_STACK))

Computes the thread working area global size.

Definition at line 249 of file ports/GCC/ARM/chcore.h.

#define WORKING_AREA	(	s,
		n
	)	stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]

Static working area allocation.

This macro is used to allocate a static thread working area aligned as both position and size.

Definition at line 259 of file ports/GCC/ARM/chcore.h.

#define PORT_IRQ_PROLOGUE ( )

Value:

{                                               \
  asm volatile ("stmfd    sp!, {r0-r3, r12, lr}" : : : "memory");           \
}

IRQ prologue code.

This macro must be inserted at the start of all IRQ handlers enabled to invoke system APIs.

Note:: This macro has a different implementation depending if compiled in ARM or THUMB mode.; The THUMB implementation starts with ARM code because interrupt vectors are always invoked in ARM mode regardless the bit 0 value. The switch in THUMB mode is done in the function prologue so it is transparent to the user code.

Definition at line 282 of file ports/GCC/ARM/chcore.h.

#define PORT_IRQ_EPILOGUE ( )

Value:

{                                               \
  asm volatile ("b       _port_irq_common" : : : "memory");                 \
}

IRQ epilogue code.

This macro must be inserted at the end of all IRQ handlers enabled to invoke system APIs.

Note:: This macro has a different implementation depending if compiled in ARM or THUMB mode.

Definition at line 302 of file ports/GCC/ARM/chcore.h.

#define PORT_IRQ_HANDLER ( id ) __attribute__((naked)) void id(void)

IRQ handler function declaration.

Note:: id can be a function name or a vector number depending on the port implementation.

Definition at line 314 of file ports/GCC/ARM/chcore.h.

#define PORT_FAST_IRQ_HANDLER ( id ) __attribute__((interrupt("FIQ"))) void id(void)

Fast IRQ handler function declaration.

Note:: id can be a function name or a vector number depending on the port implementation.

Definition at line 323 of file ports/GCC/ARM/chcore.h.

#define port_init ( void )

Port-related initialization code.

Note:: This function is empty in this port.

Definition at line 331 of file ports/GCC/ARM/chcore.h.

#define port_lock ( void ) asm volatile ("msr CPSR_c, #0x9F" : : : "memory")

Kernel-lock action.

Usually this function just disables interrupts but may perform more actions.

Note:: In this port it disables the IRQ sources and keeps FIQ sources enabled.

Definition at line 345 of file ports/GCC/ARM/chcore.h.

#define port_unlock ( void ) asm volatile ("msr CPSR_c, #0x1F" : : : "memory")

Kernel-unlock action.

Usually this function just enables interrupts but may perform more actions.

Note:: In this port it enables both the IRQ and FIQ sources.

Definition at line 359 of file ports/GCC/ARM/chcore.h.

#define port_lock_from_isr ( void )

Kernel-lock action from an interrupt handler.

This function is invoked before invoking I-class APIs from interrupt handlers. The implementation is architecture dependent, in its simplest form it is void.

Note:: Empty in this port.

Definition at line 369 of file ports/GCC/ARM/chcore.h.

#define port_unlock_from_isr ( void )

Kernel-unlock action from an interrupt handler.

This function is invoked after invoking I-class APIs from interrupt handlers. The implementation is architecture dependent, in its simplest form it is void.

Note:: Empty in this port.

Definition at line 378 of file ports/GCC/ARM/chcore.h.

#define port_disable ( void )

Value:

{                                                    \
  asm volatile ("mrs     r3, CPSR                       \n\t"               \
                "orr     r3, #0x80                      \n\t"               \
                "msr     CPSR_c, r3                     \n\t"               \
                "orr     r3, #0x40                      \n\t"               \
                "msr     CPSR_c, r3" : : : "r3", "memory");                 \
}

Disables all the interrupt sources.

Note:: Of course non-maskable interrupt sources are not included.; In this port it disables both the IRQ and FIQ sources.; Implements a workaround for spurious interrupts taken from the NXP LPC214x datasheet.

Definition at line 392 of file ports/GCC/ARM/chcore.h.

#define port_suspend ( void ) asm volatile ("msr CPSR_c, #0x9F" : : : "memory")

Disables the interrupt sources below kernel-level priority.

Note:: Interrupt sources above kernel level remains enabled.; In this port it disables the IRQ sources and enables the FIQ sources.

Definition at line 412 of file ports/GCC/ARM/chcore.h.

#define port_enable ( void ) asm volatile ("msr CPSR_c, #0x1F" : : : "memory")

Enables all the interrupt sources.

Note:: In this port it enables both the IRQ and FIQ sources.

Definition at line 424 of file ports/GCC/ARM/chcore.h.

#define port_switch	(	ntp,
		otp
	)	_port_switch_arm(ntp, otp)

Performs a context switch between two threads.

This is the most critical code in any port, this function is responsible for the context switch between 2 threads.

Note:: The implementation of this code affects directly the context switch performance so optimize here as much as you can.; Implemented as inlined code for performance reasons.

Parameters: