ChibiOS/HAL
6.1.0
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MII macros and structures. More...
Go to the source code of this file.
Macros | |
Generic MII registers | |
#define | MII_BMCR 0x00 |
#define | MII_BMSR 0x01 |
#define | MII_PHYSID1 0x02 |
#define | MII_PHYSID2 0x03 |
#define | MII_ADVERTISE 0x04 |
#define | MII_LPA 0x05 |
#define | MII_EXPANSION 0x06 |
#define | MII_ANNPTR 0x07 |
#define | MII_CTRL1000 0x09 |
#define | MII_STAT1000 0x0a |
#define | MII_ESTATUS 0x0f |
#define | MII_PHYSTS 0x10 |
#define | MII_MICR 0x11 |
#define | MII_DCOUNTER 0x12 |
#define | MII_FCSCOUNTER 0x13 |
#define | MII_NWAYTEST 0x14 |
#define | MII_RERRCOUNTER 0x15 |
#define | MII_SREVISION 0x16 |
#define | MII_RESV1 0x17 |
#define | MII_LBRERROR 0x18 |
#define | MII_PHYADDR 0x19 |
#define | MII_RESV2 0x1a |
#define | MII_TPISTATUS 0x1b |
#define | MII_NCONFIG 0x1c |
Basic mode control register | |
#define | BMCR_RESV 0x007f |
#define | BMCR_CTST 0x0080 |
#define | BMCR_FULLDPLX 0x0100 |
#define | BMCR_ANRESTART 0x0200 |
#define | BMCR_ISOLATE 0x0400 |
#define | BMCR_PDOWN 0x0800 |
#define | BMCR_ANENABLE 0x1000 |
#define | BMCR_SPEED100 0x2000 |
#define | BMCR_LOOPBACK 0x4000 |
#define | BMCR_RESET 0x8000 |
Basic mode status register | |
#define | BMSR_ERCAP 0x0001 |
#define | BMSR_JCD 0x0002 |
#define | BMSR_LSTATUS 0x0004 |
#define | BMSR_ANEGCAPABLE 0x0008 |
#define | BMSR_RFAULT 0x0010 |
#define | BMSR_ANEGCOMPLETE 0x0020 |
#define | BMSR_MFPRESUPPCAP 0x0040 |
#define | BMSR_RESV 0x0780 |
#define | BMSR_10HALF 0x0800 |
#define | BMSR_10FULL 0x1000 |
#define | BMSR_100HALF 0x2000 |
#define | BMSR_100FULL 0x4000 |
#define | BMSR_100BASE4 0x8000 |
Advertisement control register | |
#define | ADVERTISE_SLCT 0x001f |
#define | ADVERTISE_CSMA 0x0001 |
#define | ADVERTISE_10HALF 0x0020 |
#define | ADVERTISE_10FULL 0x0040 |
#define | ADVERTISE_100HALF 0x0080 |
#define | ADVERTISE_100FULL 0x0100 |
#define | ADVERTISE_100BASE4 0x0200 |
#define | ADVERTISE_PAUSE_CAP 0x0400 |
#define | ADVERTISE_PAUSE_ASYM 0x0800 |
#define | ADVERTISE_RESV 0x1000 |
#define | ADVERTISE_RFAULT 0x2000 |
#define | ADVERTISE_LPACK 0x4000 |
#define | ADVERTISE_NPAGE 0x8000 |
#define | ADVERTISE_FULL |
#define | ADVERTISE_ALL |
Link partner ability register | |
#define | LPA_SLCT 0x001f |
#define | LPA_10HALF 0x0020 |
#define | LPA_10FULL 0x0040 |
#define | LPA_100HALF 0x0080 |
#define | LPA_100FULL 0x0100 |
#define | LPA_100BASE4 0x0200 |
#define | LPA_PAUSE_CAP 0x0400 |
#define | LPA_PAUSE_ASYM 0x0800 |
#define | LPA_RESV 0x1000 |
#define | LPA_RFAULT 0x2000 |
#define | LPA_LPACK 0x4000 |
#define | LPA_NPAGE 0x8000 |
#define | LPA_DUPLEX (LPA_10FULL | LPA_100FULL) |
#define | LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) |
Expansion register for auto-negotiation | |
#define | EXPANSION_NWAY 0x0001 |
#define | EXPANSION_LCWP 0x0002 |
#define | EXPANSION_ENABLENPAGE 0x0004 |
#define | EXPANSION_NPCAPABLE 0x0008 |
#define | EXPANSION_MFAULTS 0x0010 |
#define | EXPANSION_RESV 0xffe0 |
N-way test register | |
#define | NWAYTEST_RESV1 0x00ff |
#define | NWAYTEST_LOOPBACK 0x0100 |
#define | NWAYTEST_RESV2 0xfe00 |
PHY identifiers | |
#define | MII_DM9161_ID 0x0181b8a0 |
#define | MII_AM79C875_ID 0x00225540 |
#define | MII_KSZ8081_ID 0x00221560 |
#define | MII_KS8721_ID 0x00221610 |
#define | MII_STE101P_ID 0x00061C50 |
#define | MII_DP83848I_ID 0x20005C90 |
#define | MII_LAN8710A_ID 0x0007C0F1 |
#define | MII_LAN8720_ID 0x0007C0F0 |
#define | MII_LAN8742A_ID 0x0007C130 |
MII macros and structures.
Definition in file hal_mii.h.